The Phoebe Risc PC 2
Acorn's Last Machine
This page, RPCEmu's Phoebe development and Phoebe file downloads have been produced with the kind assistance of The Centre for Computing History. They provided access to the one remaining machine for testing and archiving.
- Introduction
- The Mock Ups
- The FPGA-based prototypes
- The Real Machines and the end of Phoebe
- Update 6/2015
- Emulating the Real Machines
- Technical details on emulation requirements
Introduction
The Phoebe 2100, Phoebe Risc PC 2 or just Phoebe, was Acorn Computers' last attempt to design and build a machine for the education, home and business markets. Although Acorn failed to make it to a sellable product, due to them abandoning those markets in 1998, enough of the development work survived to investigate.
The functional specification talked about multi-processor support, requiring a new OS, but the choice was made that the first version would be a single CPU machine running an enhanced version of RISC OS.
Work on Phoebe started in November 1996 and first came to the public's attention in 1997, but a protracted development meant that a release before early 1999 wasn't likely and it was cancelled in September 1998.
The Mock Ups
"Some of you have seen a prototype, some of you have had a quick play with a mock up, you've all heard of her (unless you've been on Mars for the past 6 months)", Clan Newsletter, August 1998.
These mock ups were likely Risc PC (1) machines running softloadable versions of RISC OS 3.80. For more information on the Risc PC version of 3.80 see:
The FPGA-based prototypes
A new IO chip for the machine was needed to deliver the required improvements in performance and to update the IO capability to modern standards.
The IOMD2 expanded the IO bus to 32 bits wide (compared to the previous IOMD's 16 bit) and allowed considerably higher IO and memory bandwith, 32MHz to 64MHz. It was also designed to support the multi-CPU architecture that Phoebe was planned to have supported.
Acorn designed this chip themselves and it was a long and expensive job. Commentators at the time put the failure of the Phoebe project largely on the development of this chip.
The IOMD2 design was prototyped using an FPGA (Field Programmable Gate Array) chip, a device containing programmable logic, which enabled the engineers to experiment and test the design before it was sent off for production. In the Phoebe this was an Altera FLEX FPGA.
An earlier Risc PC motherboard sized prototype
A later NLX motherboard sized prototype
Acorn Gaming's review of the Acorn Southeast 1998 show also features a photo of an early Phoebe.
The Real Machines and the end of Phoebe
Once production IOMD2 chips arrived they were soldered onto waiting production motherboards and the Phoebe hardware was complete.
"Stop Press: "She's Alive!" You'll be pleased to know that a production-design Phoebe motherboard fitted with an early-silicon IOMD2 ASIC booted RISC OS 4.0 for the first time this morning.", Dave Walker, Acorn Registered Developer Mailing list, 15 Septemer 1998.
Due to the Phoebe project being cancelled two days after the first IOMD2 chips arrived, only two production design machines were assembled; both of these are now in museums:
- The Centre for Computing History, in Cambridge
- The National Museum of Computing, at Bletchley Park
The Centre for Computing History has the only operational machine.
While the hardware was completed, OS support for PCI (and therefore networking), sound, floppy disc drives and other sections was not finished.
Therefore while the Phoebe had more potential then a Risc PC, it was never realised.
"We have reluctanly decided to cancel the proposed Risc PC 2 / Phoebe product development and we will be refunding any deposits taken for Phoebe in full." Stan Boland, Acorn Computers CEO, 17 September 1998.
The motherboard of the complete machine (click for larger).
Update 6/2015
Early information provided to registered developers is contained in the handouts of the August 1997 developer conference.
Mass production of Phoebe was to be handled by the Canadian company Celestica, the assembly instructions are available here.
A picture of a mock-up of the production model motherboard used in the assembly instructions
Emulating the Real Machines
- You must use the Interpreter version of RPCEmu (not Recompiler)
- Regardless of how much memory you chose you will always get 128MB RAM
- It is not (yet) compatible with the SyncClock module.
- This is a buggy emulator of a buggy/incomplete OS running on unfinished/untested emulated hardware. This is not a sensible option for running RISC OS applications in any way and should be considered for historic entertainment purposes only.
These instructions assume you have had some prior experience with installing and running RPCEmu before. They are not particulaly detailed. If starting from scratch try our - Installing RPCEmu and RISC OS 3.71 on Windows - guide.
- Install a copy of RPCEmu 0.8.11 or later
- Unzip a copy of the Phoebe 3.80 rom image into /roms
- Unzip a copy of the Phoebe boot sequence into /hostfs
- Move or remove the copy of SyncClock,ffa from /poduleroms
- Open the rpc.cfg file and edit the model line to read 'model = Phoebe'
- Run the Interpreter version of emulator, and once it has booted to RISC OS,
configure it to Boot from Hostfs.
*configure filesystem hostfs *configure boot
And reboot the emulator
Technical details of emulation requirements
In summary the primary differences between the Risc PC and the Phoebe are
- The physical memory map has increased from 512MiB to 1024MiB
- Support for 4MiB VRAM
- IOMD2 support adds extra interrupt handling
- A new PC-style SuperIO chip the SMSC FDC37C672 replaces the FDC37C665GT
- PS/2 keyboard and mouse handling has moved from the IOMD to the Intel 8042 compatible module in the SMSC FDC37672 SuperIO chip.
- Instead of probing the memory map to determine RAM sizes, an I2C device on the SDRAM DIMM provides information about the type and size of memory.